`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2020/11/11 11:32:59
// Design Name: 
// Module Name: reader
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module reader(
    input [7:0] d_i,
    output reg [3:0] highdigit_o,
    output reg [3:0] lowdigit_o
    );
    
    always @(d_i) begin
        highdigit_o <= {d_i[7], d_i[6], d_i[5], d_i[4]};
		lowdigit_o <= {d_i[3], d_i[2], d_i[1], d_i[0]};
    end
endmodule
